CSET 4650
Field Programmable Logic Devices 
Spring 2003

Note: The Spring session for 2003 begins on January 13th, 2003 and ends on May 2nd, 2003.
This is a total of fifteen weeks. If this class were meeting on campus, we would have a total of thirty meetings.
You have to cover two periods per week 

Period	Topics	PowerPoint Presentations
1	Introduction and Course Overview Introduction for Distance Learning Students Overview of FPGAs :    A Brief Introduction to Field Programmable Gate Arrays Major Programming Technologies
2	Xilinx XC4000 Architecture
3	Configurable Logic Blocks Look-Up Tables and Programmable Multiplexers
4	Configurable Logic Blocks 2 Output Registers, Fast-Carry Logic and Programmable Interconnect
5	Lucent ORCA 2C and Altera FLEX 8000 Architectures
6	Design Flow Overview
7	Design Flow Overview  Design Entry and  Implementation
8	Design Flow Overview Design Verification
9	Schematic Entry How to open a new project  Placing Symbols, Adding I/O Buffers, Pads or I/O Terminals.	PPT
10	Schematic Entry continued .. page #6   Learning to draw lines and add pin locations, name, title and date.	PPT
Period	Period 11 onwards
11	Schematic Entry continued.. page #11 Netlist and Integrity test	PPT
12	Schematic Entry continued .. page #14 Learning to save and add the schematic to the project	PPT
13	Design Entry with ABEL Learning to open the project in Foundation Series Project Manager.	PPT
14	Design Entry with ABEL Creating the Design.	PPT
15	Design Entry with ABEL Assignment of port names with the HDL Wizard.	PPT
16	Design Entry with ABEL Creation of .abl file using HDL editor	PPT
17	Term Test
18	Design Simulation Functional Simulation Opening the Schematic Editor and selection of input/output signals.	PPT
19	Design Simulation Functional Simulation Adding external stimuli	PPT
20	Design Simulation Functional Simulation Viewing the waveforms	PPT
Period	Period 20 onwards
21	Design Simulation  Timing Simulation, Opening the Schematic Editor and selection of input/output signals.	PPT
22	Design Simulation Timing simulation, Adding external stimuli	PPT
23	Design Simulation  Timing Simulation Viewing the waveforms	PPT
24	Design Implementation Implementation Steps Translation of schematic into FPGA elements.	PPT
25	Design Implementation Creation of Schematic and Introduction to Mapping the design	PPT
26	Design Implementation Mapping the design to particular target device	PPT
27	Design Implementation Study of Place and Route Reports	PPT
28	Design Implementation Study of Timing Reports	PPT
29	Device Configuration Study of FPGA demo board	PPT
30	Device Configuration Downloading the bit stream	PPT
Final Examination